The Designer's Guide to VHDL. (Record no. 912530)

001 - CONTROL NUMBER
control field EBL452921
006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS
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007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field ta
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 800623|uuuuuuuuxx||||||s |||||||eng||
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780080568850
Terms of availability 131.31 (UA),87.54 (1U)
035 ## - SYSTEM CONTROL NUMBER
System control number (AU-PeEL)452921
035 ## - SYSTEM CONTROL NUMBER
System control number (OCoLC)281596147
040 ## - CATALOGING SOURCE
Original cataloging agency AU-PeEL
Language of cataloging eng
Transcribing agency AU-PeEL
Modifying agency AU-PeEL
050 #4 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7888.3.A863 2008
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.392
090 ## - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (OCLC)
Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) TK7888.3.A863 2008
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Ashenden, Peter J.
245 14 - TITLE STATEMENT
Title The Designer's Guide to VHDL.
250 ## - EDITION STATEMENT
Edition statement 3rd ed.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Burlington :
Name of publisher, distributor, etc Elsevier Science,
Date of publication, distribution, etc 2014.
300 ## - PHYSICAL DESCRIPTION
Extent 1 online resource (933 p.)
490 0# - SERIES STATEMENT
Series statement eBooks on Demand
490 1# - SERIES STATEMENT
Series statement Systems on Silicon ;
Volume number/sequential designation v.3
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Front Cover; The Designer's Guide to VHDL; Copyright Page; Contents; Preface; Chapter 1. Fundamental Concepts; 1.1 Modeling Digital Systems; 1.2 Domains and Levels of Modeling; 1.3 Modeling Languages; 1.4 VHDL Modeling Concepts; 1.5 Learning a New Language: Lexical Elements and Syntax; Exercises; Chapter 2. Scalar Data Types and Operations; 2.1 Constants and Variables; 2.2 Scalar Types; 2.3 Type Classification; 2.4 Attributes of Scalar Types; 2.5 Expressions and Predefined Operations; Exercises; Chapter 3. Sequential Statements; 3.1 If Statements; 3.2 Case Statements; 3.3 Null Statements
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 3.4 Loop Statements3.5 Assertion and Report Statements; Exercises; Chapter 4. Composite Data Types and Operations; 4.1 Arrays; 4.2 Unconstrained Array Types; 4.3 Array Operations and Referencing; 4.4 Records; Exercises; Chapter 5. Basic Modeling Constructs; 5.1 Entity Declarations and Architecture Bodies; 5.2 Behavioral Descriptions; 5.3 Structural Descriptions; 5.4 Design Processing; Exercises; Chapter 6. Subprograms; 6.1 Procedures; 6.2 Procedure Parameters; 6.3 Concurrent Procedure Call Statements; 6.4 Functions; 6.5 Overloading; 6.6 Visibility of Declarations; Exercises
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note Chapter 7. Packages and Use Clauses7.1 Package Declarations; 7.2 Package Bodies; 7.3 Use Clauses; Exercises; Chapter 8. Resolved Signals; 8.1 Basic Resolved Signals; 8.2 Resolved Signals, Ports, and Parameters; Exercises; Chapter 9. Predefined and Standard Packages; 9.1 The Predefined Packages standard and env; 9.2 IEEE Standard Packages; Exercises; Chapter 10 Case Study: A Pipelined Multiplier Accumulator; 10.1 Algorithm Outline; 10.2 A Behavioral Model; 10.3 A Register-Transfer-Level Model; Exercises; Chapter 11. Aliases; 11.1 Aliases for Data Objects; 11.2 Aliases for Non-Data Items
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note ExercisesChapter 12. Generics; 12.1 Generic Constants; 12.2 Generic Types; 12.3 Generic Lists in Packages; 12.4 Generic Lists in Subprograms; 12.5 Generic Subprograms; 12.6 Generic Packages; Exercises; Chapter 13. Components and Configurations; 13.1 Components; 13.2 Configuring Component Instances; 13.3 Configuration Specifications; Exercises; Chapter 14. Generate Statements; 14.1 Generating Iterative Structures; 14.2 Conditionally Generating Structures; 14.3 Configuration of Generate Statements; Exercises; Chapter 15. Access Types; 15.1 Access Types; 15.2 Linked Data Structures
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 15.3 An Ordered-Dictionary ADT Using Access TypesExercises; Chapter 16. Files and Input/Output; 16.1 Files; 16.2 The Package Textio; Exercises; Chapter 17. Case Study: A Package for Memories; 17.1 The Memories Package; 17.2 Using the Memories Package; Exercises; Chapter 18. Test Bench and Verification Features; 18.1 External Names; 18.2 Force and Release Assignments; 18.3 Embedded PSL in VHDL; Exercises; Chapter 19. Shared Variables and Protected Types; 19.1 Shared Variables and Mutual Exclusion; 19.2 Uninstantiated Methods in Protected Types; Exercises; Chapter 20. Attributes and Groups
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 20.1 Predefined Attributes
520 ## - SUMMARY, ETC.
Summary, etc VHDL, the IEEE standard hardware description language for describing digital electronic systems, has recently been revised. This book has become a standard in the industry for learning the features of VHDL and using it to verify hardware designs. This third edition is the first comprehensive book on the market to address the new features of VHDL-2008.<br><br>* First comprehensive book on VHDL to incorporate all new features of VHDL-2008, the latest release of the VHDL standard...helps readers get up to speed quickly with new features of the new standard.<br>* Presents a structured guide to t
588 ## -
-- Description based upon print version of record.
650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Electronic digital computers - Computer simulation.
650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element VHDL (Computer hardware description language).
650 #4 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element VHDL (Computer hardware description language).
655 #0 - INDEX TERM--GENRE/FORM
Genre/form data or focus term Electronic books.
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Print version:
Main entry heading Ashenden, Peter J.
Title The Designer's Guide to VHDL
Place, publisher, and date of publication Burlington : Elsevier Science,c2014
International Standard Book Number 9780120887859
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
Uniform title Systems on Silicon
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="http://uttyler.eblib.com/patron/FullRecord.aspx?p=452921">http://uttyler.eblib.com/patron/FullRecord.aspx?p=452921</a>
Link text Click here to view this ebook.
901 ## - LOCAL DATA ELEMENT A, LDA (RLIN)
Platform EBL
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Electronic Book
Source of classification or shelving scheme
Holdings
Withdrawn status Lost item Source of classification or shelving scheme Damaged status Not for loan Permanent Location Current Location Shelving location Date acquired Full call number Barcode Date last seen Uniform Resource Identifier Price effective from Koha item type
          UT Tyler Online UT Tyler Online Online 2015-11-30 TK7888.3.A863 2008 EBL452921 2015-11-30 http://uttyler.eblib.com/patron/FullRecord.aspx?p=452921 2015-11-30 Electronic Book