Reconfigurable Computing : The Theory and Practice of FPGA-Based Computation

By: Hauck, ScottContributor(s): DeHon, AndréMaterial type: TextTextSeries: eBooks on DemandSystems on Silicon: Publisher: Burlington : Elsevier Science, 2014Description: 1 online resource (945 p.)ISBN: 9780080556017Subject(s): Adaptive computing systems | Adaptive computing systems | Field programmable gate arraysGenre/Form: Electronic books.Additional physical formats: Print version:: Reconfigurable Computing : The Theory and Practice of FPGA-Based ComputationDDC classification: 621.395 LOC classification: QA76.9.A3R43 2008Online resources: Click here to view this ebook.
Contents:
Front Cover; Reconfigurable Computing; Copyright Page; Table of Contents; List of Contributors; Preface; Introduction; Part I: Reconfigurable Computing Hardware; Chapter 1. Device Architecture; 1.1 Logic-The Computational Fabric; 1.2 The Array and Interconnect; 1.3 Extending Logic; 1.4 Configuration; 1.5 Case Studies; 1.6 Summary; References; Chapter 2. Reconfigurable Computing Architectures; 2.1 Reconfigurable Processing Fabric Architectures; 2.2 RPF Integration into Traditional Computing Systems; 2.3 Summary and Future Work; References; Chapter 3. Reconfigurable Computing Systems
3.1 Early Systems3.2 PAM, VCC, and Splash; 3.3 Small-Scale Reconfigurable Systems; 3.4 Circuit Emulation; 3.5 Accelerating Technology; 3.6 Reconfigurable Supercomputing; 3.7 Non-FPGA Research; 3.8 Other System Issues; 3.9 The Future of Reconfigurable Systems; References; Chapter 4. Reconfiguration Management; 4.1 Reconfiguration; 4.2 Configuration Architectures; 4.3 Managing the Reconfiguration Process; 4.4 Reducing Configuration Transfer Time; 4.5 Configuration Security; 4.6 Summary; References; Part II: Programming Reconfigurable Systems; Chapter 5. Compute Models and System Architectures
5.1 Compute Models5.2 System Architectures; References; Chapter 6. Programming FPGA Applications in VHDL; 6.1 VHDL Programming; 6.2 Hardware Compilation Flow; 6.3 Limitations of VHDL; References; Chapter 7. Compiling C for Spatial Computing; 7.1 Overview of How C Code Runs on Spatial Hardware; 7.2 Automatic Compilation; 7.3 Uses and Variations of C Compilation to Hardware; 7.4 Summary; References; Chapter 8. Programming Streaming FPGA Applications Using Block Diagrams in Simulink; 8.1 Designing High-Performance Datapaths Using Stream-Based Operators; 8.2 An Image-Processing Design Driver
8.3 Specifying Control in Simulink8.4 Component Reuse: Libraries of Simple and Complex Subsystems; 8.5 Summary; References; Chapter 9. Stream Computations Organized for Reconfigurable Execution; 9.1 Programming; 9.2 System Architecture and Execution Patterns; 9.3 Compilation; 9.4 Runtime; 9.5 Highlights; References; Chapter 10. Programming Data Parallel FPGA Applications Using the SIMD/Vector Model; 10.1 SIMD Computing on FPGAs: An Example; 10.2 SIMD Processing Architectures; 10.3 Data Parallel Languages; 10.4 Reconfigurable Computers for SIMD/Vector Processing
10.5 Variations of SIMD/Vector Computing10.6 Pipelined SIMD/Vector Processing; 10.7 Summary; References; Chapter 11. Operating System Support for Reconfigurable Computing; 11.1 History; 11.2 Abstracted Hardware Resources; 11.3 Flexible Binding; 11.4 Scheduling; 11.5 Communication; 11.6 Synchronization; 11.7 Protection; 11.8 Summary; References; Chapter 12. The JHDL Design and Debug System; 12.1 JHDL Background and Motivation; 12.2 The JHDL Design Language; 12.3 The JHDL CAD System; 12.4 JHDL'S Hardware Mode; 12.5 Advanced JHDL Capabilities; 12.6 Summary; References
Part III: Mapping Designs to Reconfigurable Platforms
Summary: <i>Reconfigurable Computing</i> marks a revolutionary and hot topic that bridges the gap between the separate worlds of hardware and software design- the key feature of reconfigurable computing is its groundbreaking ability to perform computations in hardware to increase performance while retaining the flexibility of a software solution. Reconfigurable computers serve as affordable, fast, and accurate tools for developing designs ranging from single chip architectures to multi-chip and embedded systems. <br><br>Scott Hauck and Andre DeHon have assembled a group of the key experts in the fields
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Electronic Book UT Tyler Online
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QA76.9.A3R43 2008 (Browse shelf) http://uttyler.eblib.com/patron/FullRecord.aspx?p=328310 Available EBL328310

Front Cover; Reconfigurable Computing; Copyright Page; Table of Contents; List of Contributors; Preface; Introduction; Part I: Reconfigurable Computing Hardware; Chapter 1. Device Architecture; 1.1 Logic-The Computational Fabric; 1.2 The Array and Interconnect; 1.3 Extending Logic; 1.4 Configuration; 1.5 Case Studies; 1.6 Summary; References; Chapter 2. Reconfigurable Computing Architectures; 2.1 Reconfigurable Processing Fabric Architectures; 2.2 RPF Integration into Traditional Computing Systems; 2.3 Summary and Future Work; References; Chapter 3. Reconfigurable Computing Systems

3.1 Early Systems3.2 PAM, VCC, and Splash; 3.3 Small-Scale Reconfigurable Systems; 3.4 Circuit Emulation; 3.5 Accelerating Technology; 3.6 Reconfigurable Supercomputing; 3.7 Non-FPGA Research; 3.8 Other System Issues; 3.9 The Future of Reconfigurable Systems; References; Chapter 4. Reconfiguration Management; 4.1 Reconfiguration; 4.2 Configuration Architectures; 4.3 Managing the Reconfiguration Process; 4.4 Reducing Configuration Transfer Time; 4.5 Configuration Security; 4.6 Summary; References; Part II: Programming Reconfigurable Systems; Chapter 5. Compute Models and System Architectures

5.1 Compute Models5.2 System Architectures; References; Chapter 6. Programming FPGA Applications in VHDL; 6.1 VHDL Programming; 6.2 Hardware Compilation Flow; 6.3 Limitations of VHDL; References; Chapter 7. Compiling C for Spatial Computing; 7.1 Overview of How C Code Runs on Spatial Hardware; 7.2 Automatic Compilation; 7.3 Uses and Variations of C Compilation to Hardware; 7.4 Summary; References; Chapter 8. Programming Streaming FPGA Applications Using Block Diagrams in Simulink; 8.1 Designing High-Performance Datapaths Using Stream-Based Operators; 8.2 An Image-Processing Design Driver

8.3 Specifying Control in Simulink8.4 Component Reuse: Libraries of Simple and Complex Subsystems; 8.5 Summary; References; Chapter 9. Stream Computations Organized for Reconfigurable Execution; 9.1 Programming; 9.2 System Architecture and Execution Patterns; 9.3 Compilation; 9.4 Runtime; 9.5 Highlights; References; Chapter 10. Programming Data Parallel FPGA Applications Using the SIMD/Vector Model; 10.1 SIMD Computing on FPGAs: An Example; 10.2 SIMD Processing Architectures; 10.3 Data Parallel Languages; 10.4 Reconfigurable Computers for SIMD/Vector Processing

10.5 Variations of SIMD/Vector Computing10.6 Pipelined SIMD/Vector Processing; 10.7 Summary; References; Chapter 11. Operating System Support for Reconfigurable Computing; 11.1 History; 11.2 Abstracted Hardware Resources; 11.3 Flexible Binding; 11.4 Scheduling; 11.5 Communication; 11.6 Synchronization; 11.7 Protection; 11.8 Summary; References; Chapter 12. The JHDL Design and Debug System; 12.1 JHDL Background and Motivation; 12.2 The JHDL Design Language; 12.3 The JHDL CAD System; 12.4 JHDL'S Hardware Mode; 12.5 Advanced JHDL Capabilities; 12.6 Summary; References

Part III: Mapping Designs to Reconfigurable Platforms

<i>Reconfigurable Computing</i> marks a revolutionary and hot topic that bridges the gap between the separate worlds of hardware and software design- the key feature of reconfigurable computing is its groundbreaking ability to perform computations in hardware to increase performance while retaining the flexibility of a software solution. Reconfigurable computers serve as affordable, fast, and accurate tools for developing designs ranging from single chip architectures to multi-chip and embedded systems. <br><br>Scott Hauck and Andre DeHon have assembled a group of the key experts in the fields

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